Lesson 012 , PLL Troubleshooting
MP20 - PLL debug info
This lesson is just a set of data to help debug the PLL hardware in case of
trouble.
Set your FONT to COURIER to view the below schematic. It's a RF voltage probe
used
to measure the PLL oscillator voltages. The diodes are 1N914 or 1N4148
Silicon and
the caps are 100nF.
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PROBE >--||---|---| >|-----|-------> VOLT METER
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A ---
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Use the above circuit to measure the voltage at the
output of the PLL,
PIN #6 of the 1252 video amp. My measurements with the above circuit
showed 2.1 volts DC. On an oscilloscope, I measure about 2 volts P-P.
The output of the 8.192 ref oscillator on the SOURCE PIN of the FET
shows 1.68 to 0.64 volts. The voltage changes as I turn the Freq Pot
from low to hi.
OK here is the test setup for the PLL. Set the PLL switches to read
as follows if you have all 5 octal switches [40113].
This should produce a PLL/VCO freq of 14,060 KHz. The actual range
using the freq control pot is 14,052 - 14,069. If you have binary switches
then set the inputs to the divider as follows; example...
Pin 11, which is Data "N0" measures 8 volts to ground.
PIN 11 - N0 - 8V
PIN 12 - N1 - 8V
PIN 13 - N2 - 0V
PIN 14 - N3 - 8V
PIN 15 - N4 - 8V
PIN 16 - N5 - 8V
PIN 17 - N6 - 0V
PIN 18 - N7 - 8V
PIN 19 - N8 - 8V
PIN 20 - N9 - 0V
PIN 22 - N12 - 0V
PIN 23 - N13 - 0V
PIN 24 - N10 - 8V
PIN 25 - N11 - 0V
Also make sure that pins 5 and 7 are floating and pin
6 is grounded on the PLL.
If you have the above setting, you have the PLL set correctly to
"create" 14,060 KHz. The capacitance (C25) required to make the
PLL find lock is about 120 pF. Lock is defined as measuring a steady DC
voltage across capacitor C15 in the range of 1-7 volts.
Here are some voltage measurements. Your measurements should be within a
few tenths of a volt compared to my measurements.
LMC662
Pin 1 - 2.9 V
Pin 2 - 4.0 V
Pin 3 - 4.0 V
Pin 5 - 5.2 V
Pin 6 - 4.0 V
LT1252
Pin 2 - 4.0
Pin 3 - 4.0
Pin 6 - 4.0
Voltage across the 750 K resistor
(R20)is about 0.64 volts.